HySonLab/DiffPlace

DiffPlace: A Conditional Diffusion Framework for Simultaneous VLSI Placement Beyond Sequential Paradigms

31
/ 100
Emerging

This tool helps chip designers automatically arrange components on a silicon chip. You provide the design specifications for your integrated circuit, and it generates an optimized placement layout, showing where each logic gate and macro should be on the chip. It's for electrical engineers, VLSI designers, and CAD tool developers who work on creating complex microchips.

Use this if you need to quickly generate efficient and high-quality physical layouts for very large scale integration (VLSI) designs, especially modern System-on-Chip (SoC) architectures.

Not ideal if you are looking for a general-purpose circuit simulator or a tool for front-end hardware description language (HDL) design.

VLSI design chip layout physical design automation integrated circuit design EDA tools
No License No Package No Dependents
Maintenance 10 / 25
Adoption 4 / 25
Maturity 8 / 25
Community 9 / 25

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7

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Language

Python

License

Last pushed

Jan 17, 2026

Commits (30d)

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