hwkim-dev/NPU-FPGA-Transformer-Accelerator-KV260

A Transformer(gemma3N E4B LLM)accelerator based on a 2D (Floating-Point) Systolic Array, bitShift-only-Adder, architecture and dynamic multi channel memory management optimization techniques designed by SystemVerilog for edge devices. Target board: KV260(FPGA), Tool: Xilinx Vivado

26
/ 100
Experimental
No Package No Dependents
Maintenance 13 / 25
Adoption 2 / 25
Maturity 11 / 25
Community 0 / 25

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2

Forks

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Language

SystemVerilog

License

MIT

Last pushed

Apr 06, 2026

Commits (30d)

0

GitHub

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