NYU-MLDA/OpenABC
OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph level prediction problems in chip design.
This project provides a comprehensive dataset for integrated circuit (IC) synthesis. It contains various versions of hardware designs undergoing different optimization strategies, including their initial, intermediate, and final forms. The dataset helps IC designers and researchers predict how different synthesis approaches will affect the chip's performance (like area and speed) and explore new machine learning methods for designing better chips.
144 stars. No commits in the last 6 months.
Use this if you are an integrated circuit designer or researcher looking for a large, pre-processed dataset to train machine learning models for predicting chip quality of results (QoR), exploring synthesis recipes, or understanding AIG features.
Not ideal if you are looking for a tool to perform chip synthesis directly, rather than a dataset for machine learning model development.
Stars
144
Forks
24
Language
Verilog
License
BSD-3-Clause
Category
Last pushed
Jul 23, 2025
Commits (30d)
0
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