OpenMachine-ai/tinyfive

TinyFive is a lightweight RISC-V emulator and assembler written in Python with neural network examples

47
/ 100
Emerging

This tool helps hardware engineers and researchers working with RISC-V processors to quickly test and simulate their assembly code, especially when integrating neural networks. You provide RISC-V assembly instructions and the tool shows you the computed output, often without needing a full RISC-V hardware setup or complex toolchains. It's designed for those who need to simulate RISC-V operations and custom instructions within a Python environment.

No commits in the last 6 months. Available on PyPI.

Use this if you are a hardware or embedded systems engineer, or an ML researcher, needing to simulate RISC-V assembly code, particularly for neural network inference, within a Python environment.

Not ideal if you need a high-performance, full-featured hardware simulator or are developing production-grade RISC-V applications that require extensive debugging tools.

RISC-V simulation embedded systems neural network hardware HW/SW codesign compiler optimization
Stale 6m
Maintenance 0 / 25
Adoption 9 / 25
Maturity 25 / 25
Community 13 / 25

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Stars

71

Forks

9

Language

Python

License

MIT

Last pushed

Nov 01, 2023

Commits (30d)

0

Dependencies

1

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