Thinklab-SJTU/EDA-AI

Implementations of DeepPlace, PRNet, HubRouter, PreRoutGNN, FlexPlanner and DSBRouter.

53
/ 100
Established

This project offers advanced algorithms for automating complex steps in chip design. It takes in circuit specifications and generates optimized layouts for component placement and routing paths, aiming for better performance and efficiency. Integrated circuit designers and electronic design automation (EDA) engineers would use this to accelerate the design process for microchips.

298 stars.

Use this if you are an integrated circuit designer or an EDA engineer looking to apply state-of-the-art machine learning techniques to optimize chip placement and routing.

Not ideal if you are looking for a general-purpose simulation tool or a high-level design environment for non-chip-related electronic circuits.

chip-design electronic-design-automation integrated-circuits VLSI circuit-layout-optimization
No Package No Dependents
Maintenance 6 / 25
Adoption 10 / 25
Maturity 16 / 25
Community 21 / 25

How are scores calculated?

Stars

298

Forks

55

Language

C

License

MIT

Last pushed

Nov 23, 2025

Commits (30d)

0

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