hunterlew/convolution_network_on_FPGA

CNN acceleration on virtex-7 FPGA with verilog HDL

43
/ 100
Emerging

This project helps embedded systems engineers and researchers accelerate the processing of Synthetic Aperture Radar (SAR) target classification. It takes a pre-trained SAR target classification network, converts its weights and inputs, and then runs the classification inference on a Virtex-7 FPGA. The result is extremely fast image classification, completing in under 1 millisecond per image.

475 stars. No commits in the last 6 months.

Use this if you need to perform very high-speed, low-latency SAR target classification inference directly on an FPGA.

Not ideal if you are looking to train neural networks on an FPGA or if your application doesn't involve SAR data or real-time embedded classification.

Embedded Systems Real-time Classification SAR Image Processing FPGA Acceleration Target Recognition
No License Stale 6m No Package No Dependents
Maintenance 0 / 25
Adoption 10 / 25
Maturity 8 / 25
Community 25 / 25

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Stars

475

Forks

138

Language

Verilog

License

Last pushed

Feb 27, 2018

Commits (30d)

0

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