yonseicasl/NPUsim
NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators
This framework helps hardware architects and researchers design and analyze specialized hardware for deep neural networks (DNNs). It takes your proposed DNN accelerator specifications, DNN network configurations, and a scheduling table as input. It then outputs detailed, cycle-level simulation results, showing how your accelerator performs before you build physical hardware. Hardware architects, computer architects, and system designers would use this.
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Use this if you are designing or evaluating a new deep neural network accelerator and need to understand its performance and efficiency at a cycle-level, pre-silicon.
Not ideal if you are a software developer looking to train or deploy DNNs, or if you need to simulate general-purpose CPUs or GPUs.
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C++
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Last pushed
Jan 02, 2025
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