FPGA Neural Accelerators ML Frameworks

Hardware implementations and design frameworks for neural network acceleration on FPGAs, including systolic arrays, HLS synthesis tools, and optimization for edge inference. Does NOT include general FPGA design, software ML frameworks, or CPU/GPU-based accelerators.

There are 61 fpga neural accelerators frameworks tracked. 6 score above 50 (established tier). The highest-rated is fastmachinelearning/hls4ml at 68/100 with 1,849 stars. 1 of the top 10 are actively maintained.

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#	Framework	Score	Tier	Stars	Language
1	fastmachinelearning/hls4ml Machine learning on FPGAs using HLS	68	Established	1,849	Python
2	alibaba/TinyNeuralNetwork TinyNeuralNetwork is an efficient and easy-to-use deep learning model...	59	Established	873	Python
3	KULeuven-MICAS/zigzag HW Architecture-Mapping Design Space Exploration Framework for Deep Learning...	58	Established	186	C++
4	fastmachinelearning/hls4ml-tutorial Tutorial notebooks for hls4ml	53	Established	416	Jupyter Notebook
5	doonny/PipeCNN An OpenCL-based FPGA Accelerator for Convolutional Neural Networks	51	Established	1,367	C
6	es-ude/elastic-ai.creator Design, train and generate neural networks optimized specifically for FPGAs.	50	Established	22	Python
7	maestro-project/maestro An analytical cost model evaluating DNN mappings (dataflows and tiling).	49	Emerging	247	MATLAB
8	fengbintu/Neural-Networks-on-Silicon This is originally a collection of papers on neural network accelerators....	48	Emerging	2,068	—
9	embedeep/Free-TPU Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI...	48	Emerging	273	Shell
10	hughperkins/VeriGPU OpenSource GPU, in Verilog, loosely based on RISC-V ISA	46	Emerging	1,280	SystemVerilog
11	hunterlew/convolution_network_on_FPGA CNN acceleration on virtex-7 FPGA with verilog HDL	43	Emerging	475	Verilog
12	walkieq/RNN_HLS An LSTM template and a few examples using Vivado HLS	42	Emerging	47	C
13	zssloth/Embedded-Neural-Network collection of works aiming at reducing model sizes or the ASIC/FPGA...	42	Emerging	568	—
14	JunningWu/Learning-NVDLA-Notes NVDLA is an Open source DL/ML accelerator, which is very suitable for...	41	Emerging	232	—
15	yonseicasl/NPUsim NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators	39	Emerging	50	C++
16	ribesstefano/Mapping-Multiple-LSTM-Models-on-FPGAs Includes the SVD-based approximation algorithms for compressing deep...	37	Emerging	16	Jupyter Notebook
17	padhi499/Image-Classification-using-CNN-on-FPGA Project is about designing a Trained Neural Network on FPGA to classify an...	37	Emerging	164	Verilog
18	IMPETUS-UdeS/rule4ml Resource Utilization and Latency Estimation for ML on FPGA.	37	Emerging	18	Python
19	hipersys-team/lightning [SIGCOMM 2023] Lightning: A Reconfigurable Photonic-Electronic SmartNIC for...	35	Emerging	44	Verilog
20	salehjg/DeepPoint-V2-FPGA The code repository of DGCNN on FPGA: Acceleration of The Point Cloud...	35	Emerging	17	C++
21	Thraetaona/Innervator Innervator: Hardware Acceleration for Neural Networks	34	Emerging	18	VHDL
22	Lumen-Laboratory/Mayoiuta Open-source Neural Processing Unit (NPU) from China ❤	34	Emerging	39	Verilog
23	halalboro/fpga-accelerators Hardware Accelerators on FPGA for Computer Vision Applications	33	Emerging	12	C++
24	SalvatoreBarone/CNN-VHDL A library of VHDL components for Neural Networks	33	Emerging	21	C++
25	yifeng-ethz/mu3e-ip-cores Mu3e experiment (PSI) IP-core Library	31	Emerging	6	Smarty
26	anupam-io/ES203-COA-CNN ES-203 Computer Organization & Architecture CNN on FPGA board	31	Emerging	17	Verilog
27	yonseicasl/NPUWattch NPUWattch: ML-based Power, Area, and Timing Modeling for Neural Accelerators	30	Emerging	5	HCL
28	jainamnahar14surat/Deep-Learning-Accelerator-Transformer-FPGA FPGA-based hardware accelerator for Transformer neural networks enabling...	30	Emerging	5	Verilog
29	Nokia-Bell-Labs/data-channel-extension [NeurIPS'24] DEX: Data Channel Extension for Efficient CNN Inference on Tiny...	29	Experimental	9	Jupyter Notebook
30	rigoorozco/m2-artix7-accelerator-card M.2 PCIe Artix 7 FPGA Accelerator Card	29	Experimental	21	C
31	hftsoi/sparse-pixels Efficient convolution for sparse data on FPGAs	28	Experimental	4	C++
32	certainly-param/garuda-accelerator Garuda: CVXIF coprocessor optimizing batch-1 attention microkernels with...	28	Experimental	3	SystemVerilog
33	fastmachinelearning/ml4fg Machine Learning on frame grabbers for ultra-low latency in situ inference	27	Experimental	6	Jupyter Notebook
34	PCov3r/FPGA_Handwritten_digit_recognition A Verilog implementation of a hand-written digit recognition Neural Network	26	Experimental	10	Jupyter Notebook
35	EngineeringSoftware/hdlp Code and data for "On the Naturalness of Hardware Descriptions" in ESEC/FSE'20	26	Experimental	2	Java
36	LorenzoValente3/Autoencoder-for-FPGA Autoencoder model for FPGA implementation using hls4ml. Repository for...	25	Experimental	7	Jupyter Notebook
37	GSTL-ITU/HORNET-RV32IMF-For-AI-Applications A custom RISC-V (RV32IMF) soft-core, "Hornet", implemented on Artix-7 FPGA...	25	Experimental	2	C
38	TadejMurovic/BNN_Deployment Part of paper: Massively Parallel Combinational Binary Neural Networks for...	24	Experimental	12	MATLAB
39	ngenehub/deepltk_fpga_examples Set of examples for DeepLTK FPGA Add-On	23	Experimental	4	LabVIEW
40	marcelwa/ls4ai Hack4Her: Logic Synthesis for AI	23	Experimental	10	Jupyter Notebook
41	mertz1999/CNN_ON_FPGA implement convolution neural network on FPGA based on VHDL design	22	Experimental	27	Jupyter Notebook
42	angeliaplutus/ipcoredesign Design & Verification of IP Cores and ICs, Artificial Intelligence	22	Experimental	1	VHDL
43	Devanik21/A-Machine-Learning-Approach-for-Optimal-Low-Power-VLSI The project uses an ML surrogate model (e.g., Random Forest) to instantly...	22	Experimental	—	Python
44	EzraWolf/TinyMOA-IHP26a IHP26a TinyTapeout implementation of a RISC-V CPU with an integrated...	22	Experimental	—	Python
45	BrosnanYuen/tt07-Neuromorphic-ASIC-with-96-Neurons Neuromorphic ASIC with 96 neurons on Tiny Tapeout 7	21	Experimental	11	Verilog
46	JochiSt/AI_FPGA running ANN on an FPGA	20	Experimental	5	SystemVerilog
47	DYGV/FPGA-Based-EdgeAI-Prototypes Xilinx DPU(Vitis AI)を用いたエッジAI実現に向けたサンプルプログラム	19	Experimental	3	C++
48	Deverne-labs/TinyML-Zybo This repository is a collection of designs invloving FPGAs and AI technologies.	19	Experimental	14	VHDL
49	PanosZin/fpga-lstm-ecg-accelerator FPGA implementation of a quantized LSTM accelerator for ECG waveform...	19	Experimental	—	C++
50	mriosrivas/Pynq-Neural-Network Complete Implementation of a Integer Neural Network using SystemVerilog...	19	Experimental	4	HTML
51	josipnigojevic/VerilogMineDetectingANN Neural Network implemented in Verilog used for distinguishing if the wave...	19	Experimental	4	C
52	ahmed-ramsey-shahin/deep-learning-accelerator A hardware implementation of a deep learning accelerator using...	18	Experimental	6	SystemVerilog
53	mcastiglia/Graph2Gates Area and delay optimization for parallel prefix adder circuits using...	17	Experimental	6	Python
54	Monish-KS/DL_and_ML_On_FPGA This repository contains implementations of various machine learning (ML)...	14	Experimental	—	VHDL
55	SivannaKing/SEU-ASIC-IOT-ECGAI Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural...	14	Experimental	16	HTML
56	XAli-SHX/FPGA-Implementation-of-Image-Processing-for-MNIST-Dataset-Based-on-CNN-Algorithm FPGA Implementation of Image Processing for MNIST Dataset Based on...	13	Experimental	11	VHDL
57	Gabriele-bot/ALVEO-PYNQ_ML Neural network inferences on Alveo cards with hls4ml framework	12	Experimental	8	Ada
58	domerin0/PyHDLNet Deep learning library that exports itself to HDL code for FPGA-based...	11	Experimental	—	Python
59	cynthi8/GNNUnlock Reproduction of https://github.com/DfX-NYUAD/GNNUnlock	11	Experimental	4	Verilog
60	tinaba96/master Optimized-FDanQ: Implementation of Hybrid Neural Network "DanQ" on Cloud...	11	Experimental	3	VHDL
61	Mesbah-Lab-UCB/DNN_MPC_Plasma_FPGA Project files for a neural network (NN) implementation on an FPGA using Vivado HLS.	10	Experimental	2	Verilog

Comparisons in this category

hls4ml and hls4ml-tutorial (68 vs 53) hls4ml and rule4ml (68 vs 37)